
Metrology and Diagnostic Techniques for Nanoelectronics
$1,025.21
- Hardcover
1454 pages
 - Release Date
3 October 2016
 
Summary
Nanoelectronics is changing the way the world communicates, and is transforming our daily lives. Continuing Moore’s law and miniaturization of low-power semiconductor chips with ever-increasing functionality have been relentlessly driving R&D of new devices, materials, and process capabilities to meet performance, power, and cost requirements. This book covers up-to-date advances in research and industry practices in nanometrology, critical for continuing technology scaling and product…
Book Details
| ISBN-13: | 9789814745086 | 
|---|---|
| ISBN-10: | 9814745081 | 
| Author: | Zhiyong Ma, David G. Seiler | 
| Publisher: | Pan Stanford Publishing Pte Ltd | 
| Imprint: | Pan Stanford Publishing Pte Ltd | 
| Format: | Hardcover | 
| Number of Pages: | 1454 | 
| Release Date: | 3 October 2016 | 
| Weight: | 1.86kg | 
| Dimensions: | 229mm x 152mm | 
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About The Author
Zhiyong Ma
Zhiyong Ma received his MS degree in materials engineering from Purdue University, Indiana, and a PhD in materials science and engineering from the University of Illinois, Urbana-Champaign. He worked in thin-film metallization and processing at Digital Equipment Corporation and joined Intel’s Corporate Quality Network in 1995. Currently, he is vice president of the Technology and Manufacturing Group and director of Technology Development and Manufacturing Labs at Intel, responsible for the CQN lab network in support of silicon and assembly technology development and manufacturing, product fault diagnostics, and silicon and platform benchmarking, including strategic business planning, analytical technique development, and metrology roadmaps. Dr. Ma holds 8 patents in underbump metallization, strained silicon transistors, secured fuse technology, and silicon diagnostic techniques, has published more than 25 refereed papers, and has coauthored a book chapter on silicide technology. His research interests include thin-film kinetics, analytical techniques and metrology, and product fault diagnostics.
David G. Seiler received his PhD and MS in physics from Purdue University and a BS in physics from Case Western Reserve University, Ohio. He is a fellow of the American Physical Society and a fellow of the Institute of Electrical and Electronic Engineers. In 2000, he received a Distinguished Alumni Award from Purdue University’s School of Science for his contributions to and achievements in semiconductors. He served as solid state physics program director in the Materials Research Division, National Science Foundation; spent a year’s sabbatical at the MIT Francis Bitter National Magnet Laboratory; and was a regents’ professor of physics at the University of North Texas. He joined the National Institute of Standards and Technology (NIST) in 1988 and served as program analyst in the program office for the director of NIST and as materials technology group leader in the Engineering Physics Division. Currently, he is chief of the division, which provides technical leadership in measurement science research, development, and standards essential to improving US economic competitiveness for advanced manufacturing. Dr. Seiler has been the chairperson and proceedings editor of 15 international conferences or workshops. He is the coeditor and coauthor of a chapter in Semiconductors and Semimetals (1992, Vol. 36) and a coauthor of a chapter in Handbook of Optics (1995, revised 2009). His current research focus is on understanding and advancing the metrology and characterization measurements needed for the future of nanoelectronics. The results of his research have been disseminated in over 200 publications and 100 talks throughout the world.
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